The present invention relates to a method and/or architecture for implementing buffers generally and, more particularly, to a method and/or architecture for implementing differential, reduced swing buffers.
Referring to FIG. 1, a conventional reduced swing buffer 10 is shown. Reduced swing buffers are typically implemented in serial data communication and high speed data transfer applications. The buffer 10 implements current steering utilizing a scaled replica biasing scheme. The conventional reduced swing buffer 10 comprises a negative bias circuit 12 and a driver circuit 14. The bias circuit 12 implements a resistor R1 and a resistor R2. The driver circuit 14 implements a resistor R3, a resistor R4 and a resistor R5. The resistors R1, R2, R3, R4 and R5 are external resistors. The external resistors R1, R2, R3, R4 and R5 require the circuit 10 to implement additional external components. The resistors R1-R5 are required since a customer needs to configure (i.e., add) a proper resistance to the circuit 10. The circuit 10 is resistance matched at a load end and not at the source end. The bias circuit 12 implements a minimum negative bias transistor MNBIAS1 in a saturated region. The driver circuit 14 implements a minimum negative bias transistor MNBIAS2 in a saturation region. The saturated transistors MNBIAS1 and MNBIAS2 require additional pins to receive the negative bias signal NBIAS. Additionally, the driver circuit 14 cannot implement a resistor across a true output (i.e., OUT) and a complement output (i.e., OUTb).
The present invention concerns a circuit configured to match an impedance of a first pin and a second pin coupled to a transmission line. A first resistor is generally coupled to the first pin and a second resistor is generally coupled to the second pin. The first and second resistors may be coupled to a common node to provide an output voltage level independent of process corner and temperature variation.
The objects, features and advantages of the present invention include providing a method and/or architecture for a differential reduced swing buffer that may (i) allow high and low output levels to remain constant across process corner and temperature, (ii) represent matched impedance of a transmission line, (iii) have an output swing less sensitive to variation in a particular load resistor value, (iv) not require any external pins to implement a replica circuit, and/or (v) have less switching noise (Ldi/dt) because of current steering.